Split gate non-volatile memory (NVM) integrated circuits (ICs) have achieved widespread adoptions for code and data storage applications. An important aspect of split gate NVM circuits is their performance, which includes endurance (number of programming or write/erase cycles) and data retention after write/erase cycling. For example, split gate embedded flash memory technology has a wide range of embedded non-volatile applications that require very high endurance and low power consumption.
On the other hand, capacitors are also widely used in ICs. Conventional capacitors, such as metal-insulator-metal (MIM) capacitors, metal-on-metal (MOM) capacitors or PIP capacitors, have been embedded into NVM ICs. However, embedding such conventional capacitors require multiple additional masks and are not conducive to high voltage (HV) capacitor applications, such as 5V. In addition, such capacitors usually have large footprints. For example, MOM capacitors employ low k dielectric of the intermetal dielectric (IMD) as the capacitor dielectric. The use of low k dielectric requires larger spacers, particularly for HV applications. This undesirably increases the footprint of the capacitor or device. Furthermore, these various disadvantages increase the overall manufacturing costs.
The present disclosure is directed to cost-effective ICs with embedded capacitors without the need of additional masks, conducive for HV application with a smaller footprint.